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Verilog: grammar for instance arrays
This adds the grammar to parse module instantiations that use an instance array. The type checker errors these as unsupported.
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5 files changed

+30
-6
lines changed

5 files changed

+30
-6
lines changed
Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
1-
KNOWNBUG
1+
CORE
22
instance_array1.sv
33

4-
^EXIT=0$
4+
^file .* line 9: no support for instance arrays$
5+
^EXIT=2$
56
^SIGNAL=0$
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--
78
--
8-
This doesn't parse.

src/hw_cbmc_irep_ids.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,7 @@ IREP_ID_ONE(verilog_declarations)
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IREP_ID_ONE(verilog_default_clocking)
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IREP_ID_ONE(verilog_default_disable)
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IREP_ID_ONE(verilog_identifier)
131+
IREP_ID_ONE(verilog_instance_array)
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IREP_ID_ONE(verilog_interconnect)
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IREP_ID_ONE(verilog_lifetime)
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IREP_ID_ONE(verilog_logical_equality)

src/verilog/parser.y

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3198,12 +3198,19 @@ hierarchical_instance_brace:
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hierarchical_instance:
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name_of_instance '(' list_of_module_connections_opt ')'
3201-
{ init($$, ID_inst); addswap($$, ID_base_name, $1); swapop($$, $3); }
3201+
{ $$ = $1; swapop($$, $3); }
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;
32033203

32043204
name_of_instance:
3205-
{ init($$, "$_&#ANON" + PARSER.get_next_id());}
3206-
| TOK_NON_TYPE_IDENTIFIER
3205+
/* Optional */
3206+
{ init($$, ID_inst);
3207+
stack_expr($$).set(ID_base_name, "$_&#ANON" + PARSER.get_next_id());
3208+
}
3209+
| TOK_NON_TYPE_IDENTIFIER unpacked_dimension_brace
3210+
{ init($$, ID_inst);
3211+
addswap($$, ID_base_name, $1);
3212+
addswap($$, ID_verilog_instance_array, $2);
3213+
}
32073214
;
32083215

32093216
list_of_module_connections_opt:

src/verilog/verilog_expr.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -903,6 +903,16 @@ class verilog_inst_baset : public verilog_module_itemt
903903
connections.front().id() == ID_named_port_connection;
904904
}
905905

906+
const typet &instance_array() const
907+
{
908+
return static_cast<const typet &>(find(ID_verilog_instance_array));
909+
}
910+
911+
typet &instance_array()
912+
{
913+
return static_cast<typet &>(add(ID_verilog_instance_array));
914+
}
915+
906916
protected:
907917
using exprt::operands;
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};

src/verilog/verilog_interfaces.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -177,6 +177,12 @@ void verilog_typecheckt::interface_inst(
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const verilog_inst_baset &statement,
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const verilog_instt::instancet &op)
179179
{
180+
if(op.instance_array().is_not_nil())
181+
{
182+
throw errort().with_location(op.source_location())
183+
<< "no support for instance arrays";
184+
}
185+
180186
bool primitive=statement.id()==ID_inst_builtin;
181187
const exprt &range_expr = static_cast<const exprt &>(op.find(ID_range));
182188

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