This repository was archived by the owner on Jan 10, 2023. It is now read-only.

Description
Running the following causes an SVG to be generated which looks like

import pcbdl as dl
ac_coupling_value = "1000u"
vcc, gnd = dl.Net("vcc"), dl.Net("gnd")
q = dl.BJT("2n3904")
C = dl.C_POL
q.BASE << (
C(ac_coupling_value, to=dl.Net("vin")),
dl.R("1k", to=vcc),
dl.R("1k", to=gnd),
)
q.COLLECTOR << (
dl.C(ac_coupling_value, to=dl.Net("vout")),
dl.R("100", to=vcc),
)
q.EMITTER << (
dl.R("100", "Rc", to=gnd),
dl.C("1u", "C10", to=gnd),
)
dl.global_context.autoname()
svg_arr = []
for svg in dl.generate_svg('test'):
svg_arr.append(svg)
f = open("test.svg", "a")
f.write(svg_arr[0])
f.close()
Commenting out dl.global_context.autoname() produces a much more readable schematic, however now components are not named sensibly:

Proposed change is that autonameing doesn't cause anonymous nets to be displayed.