From 326d3c06adc5f2dc0a2f0644a4f37c8e2cc397ba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Kr=C3=B6ning?= Date: Mon, 26 Jan 2026 15:30:57 +0100 Subject: [PATCH] build(deps): update uart_16550 to 0.5 --- Cargo.lock | 31 ++++--------------------------- Cargo.toml | 2 +- src/arch/x86_64/kernel/serial.rs | 25 ++++++++++++++++--------- 3 files changed, 21 insertions(+), 37 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index c5da6f16cf..109b2dbcee 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -844,7 +844,7 @@ dependencies = [ "pci-ids", "pci_types", "rand_chacha", - "raw-cpuid 11.6.0", + "raw-cpuid", "riscv", "sbi-rt", "semihosting", @@ -1534,15 +1534,6 @@ version = "0.9.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "99d9a13982dcf210057a8a78572b2217b667c3beacbf3a0d8b454f6f82837d38" -[[package]] -name = "raw-cpuid" -version = "10.7.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6c297679cb867470fa8c9f67dbba74a78d78e3e98d7cf2b08d6d71540f797332" -dependencies = [ - "bitflags 1.3.2", -] - [[package]] name = "raw-cpuid" version = "11.6.0" @@ -1964,7 +1955,7 @@ version = "0.10.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "fa1699c0079cb7ff77b57fd429bcfa87b1220898bb303e0e45f75789778a376d" dependencies = [ - "raw-cpuid 11.6.0", + "raw-cpuid", "x86_64", ] @@ -1976,13 +1967,10 @@ checksum = "562d481066bde0658276a35467c4af00bdc6ee726305698a55b86e61d7ad82bb" [[package]] name = "uart_16550" -version = "0.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "94d293f51425981fdb1b766beae254dbb711a17e8c4b549dc69b9b7ee0d478d5" +version = "0.5.0" +source = "git+https://github.com/phip1611/uart_16550.git?branch=rewrite#41b513588481851891f9890ecdec4d359763253c" dependencies = [ "bitflags 2.10.0", - "rustversion", - "x86", ] [[package]] @@ -2540,17 +2528,6 @@ version = "0.6.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9edde0db4769d2dc68579893f2306b26c6ecfbe0ef499b013d731b7b9247e0b9" -[[package]] -name = "x86" -version = "0.52.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2781db97787217ad2a2845c396a5efe286f87467a5810836db6d74926e94a385" -dependencies = [ - "bit_field", - "bitflags 1.3.2", - "raw-cpuid 10.7.0", -] - [[package]] name = "x86_64" version = "0.15.4" diff --git a/Cargo.toml b/Cargo.toml index 3fe9951ca7..6aa94efb4c 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -165,7 +165,7 @@ features = [ [target.'cfg(target_arch = "x86_64")'.dependencies] free-list = { version = "0.3", features = ["x86_64"] } raw-cpuid = "11" -uart_16550 = "0.4" +uart_16550 = { git = "https://github.com/phip1611/uart_16550.git", branch = "rewrite" } x86_64 = "0.15" memory_addresses = { version = "0.2.3", default-features = false, features = [ "x86_64", diff --git a/src/arch/x86_64/kernel/serial.rs b/src/arch/x86_64/kernel/serial.rs index 3e9c6b65e0..ad4c18f6f9 100644 --- a/src/arch/x86_64/kernel/serial.rs +++ b/src/arch/x86_64/kernel/serial.rs @@ -1,7 +1,10 @@ use alloc::collections::VecDeque; +use core::hint; use embedded_io::{ErrorType, Read, ReadReady, Write}; use hermit_sync::{InterruptTicketMutex, Lazy}; +use uart_16550::backend::PioBackend; +use uart_16550::{Config, Uart16550}; #[cfg(feature = "pci")] use crate::arch::x86_64::kernel::interrupts; @@ -16,7 +19,7 @@ static UART_DEVICE: Lazy> = Lazy::new(|| unsafe { InterruptTicketMutex::new(UartDevice::new()) }); struct UartDevice { - pub uart: uart_16550::SerialPort, + pub uart: Uart16550, pub buffer: VecDeque, } @@ -27,8 +30,10 @@ impl UartDevice { .serial_port_base .unwrap() .get(); - let mut uart = unsafe { uart_16550::SerialPort::new(base) }; - uart.init(); + let mut uart = unsafe { Uart16550::new_port(base).unwrap() }; + uart.init(Config::default()).unwrap(); + uart.test_loopback().unwrap(); + uart.check_remote_ready_to_receive().unwrap(); Self { uart, @@ -65,11 +70,12 @@ impl Write for SerialDevice { fn write(&mut self, buf: &[u8]) -> Result { let mut guard = UART_DEVICE.lock(); - for &data in buf { - guard.uart.send(data); + loop { + match guard.uart.try_send_bytes(buf) { + Ok(n) => return Ok(n), + Err(_) => hint::spin_loop(), + } } - - Ok(buf.len()) } fn flush(&mut self) -> Result<(), Self::Error> { @@ -81,8 +87,9 @@ impl Write for SerialDevice { pub(crate) fn get_serial_handler() -> (InterruptLine, fn()) { fn serial_handler() { let mut guard = UART_DEVICE.lock(); - if let Ok(c) = guard.uart.try_receive() { - guard.buffer.push_back(c); + + while let Ok(byte) = guard.uart.try_receive_byte() { + guard.buffer.push_back(byte); } drop(guard);