make[3]: vivado: Command not found ../common.mk:2: recipe for target 'all' failed

[nicolast0604]

Hi
I am trying lowrisc-chip v0.7 by the command:
make nexys4_ddr_ariane

I do source the vivado path by
source /tools/Xilinx/Vivado/2018.3/*.sh
and
which vivado
do found the path of vivado.
However, I do still encounter the command not found as below.
Any hint?

Nicolas

make fpga/work-fpga/nexys4_ddr_ariane/ariane_xilinx.mcs BOARD="nexys4_ddr" CPU="ariane" BITSIZE=0x400000 XILINX_PART=xc7a100tcsg324-1 XILINX_BOARD="digilentinc.com:nexys4_ddr:part0:1.1" VENDOR="ethz" MEMSIZE="0x8000000" BBL=/home/nicolast0604/lowrisc-chip-ariane-v0.7/lowrisc-quickstart/rescue.bin |& tee nexys4_ddr_ariane.log
make[1]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7'
[FPGA] Generate source list
[FPGA] Generate Bitstream
make -C fpga mcs BOARD=nexys4_ddr BITSIZE=0x400000 XILINX_PART=xc7a100tcsg324-1 XILINX_BOARD=digilentinc.com:nexys4_ddr:part0:1.1 CPU=ariane CLK_PERIOD_NS="20"
make[2]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga'
mkdir -p work-fpga/nexys4_ddr_ariane
Generating xlnx_axi_clock_converter.xci
make[3]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
rm -rf nexys4_ddr/ip/*
mkdir -p nexys4_ddr/ip
rm -rf nexys4_ddr/xlnx_axi_clock_converter.*
rm -rf component.xml
rm -rf vivado*.jou
rm -rf vivado*.log
rm -rf vivado*.str
rm -rf xgui
rm -rf .Xil
make[3]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
make[3]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
vivado -mode batch -source tcl/run.tcl
make[3]: vivado: Command not found
../common.mk:2: recipe for target 'all' failed
make[3]: *** [all] Error 127
make[3]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
Makefile:45: recipe for target 'work-fpga/nexys4_ddr_ariane/xlnx_axi_clock_converter.xci' failed
make[2]: *** [work-fpga/nexys4_ddr_ariane/xlnx_axi_clock_converter.xci] Error 2
make[2]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga'
Makefile:45: recipe for target 'fpga/work-fpga/nexys4_ddr_ariane/ariane_xilinx.mcs' failed
make[1]: *** [fpga/work-fpga/nexys4_ddr_ariane/ariane_xilinx.mcs] Error 2
make[1]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7'

[jrrk]

You need to update XILINX_ROOT and XILINX_VER in fpga/Makefile. An explanation is given in https://www.cl.cam.ac.uk/~jrrk2/docs/xilinx