From 4faa67b6f41addb7295edc758bc102f9a8e99d3c Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Fri, 14 Mar 2025 20:06:23 +0000 Subject: [PATCH 1/2] Update ecspy --- ecspy | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ecspy b/ecspy index f0bf26d57..acfaf4f9b 160000 --- a/ecspy +++ b/ecspy @@ -1 +1 @@ -Subproject commit f0bf26d577ab51094d03bfb56eea402533a6975c +Subproject commit acfaf4f9b1ce382361ae2854c126056275661305 From fd35a988df885d385214d553c8db1fd059e34f93 Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Fri, 14 Mar 2025 15:17:30 -0600 Subject: [PATCH 2/2] Add darp11 and darp11-b --- src/board/system76/darp11-b/board.c | 23 +++ src/board/system76/darp11-b/board.mk | 73 ++++++++ src/board/system76/darp11-b/gpio.c | 165 ++++++++++++++++++ .../system76/darp11-b/include/board/gpio.h | 47 +++++ src/board/system76/darp11/board.c | 23 +++ src/board/system76/darp11/board.mk | 71 ++++++++ src/board/system76/darp11/gpio.c | 165 ++++++++++++++++++ .../system76/darp11/include/board/gpio.h | 47 +++++ 8 files changed, 614 insertions(+) create mode 100644 src/board/system76/darp11-b/board.c create mode 100644 src/board/system76/darp11-b/board.mk create mode 100644 src/board/system76/darp11-b/gpio.c create mode 100644 src/board/system76/darp11-b/include/board/gpio.h create mode 100644 src/board/system76/darp11/board.c create mode 100644 src/board/system76/darp11/board.mk create mode 100644 src/board/system76/darp11/gpio.c create mode 100644 src/board/system76/darp11/include/board/gpio.h diff --git a/src/board/system76/darp11-b/board.c b/src/board/system76/darp11-b/board.c new file mode 100644 index 000000000..f069c42e5 --- /dev/null +++ b/src/board/system76/darp11-b/board.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include +#include +#include +#include + +void board_init(void) { + espi_init(); + battery_charger_disable(); + + // Allow backlight to be turned on + gpio_set(&BKL_EN, true); + // Enable camera + gpio_set(&CCD_EN, true); +} + +void board_event(void) { + espi_event(); + + ec_read_post_codes(); +} diff --git a/src/board/system76/darp11-b/board.mk b/src/board/system76/darp11-b/board.mk new file mode 100644 index 000000000..97eb0d106 --- /dev/null +++ b/src/board/system76/darp11-b/board.mk @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-3.0-only + +board-y += board.c +board-y += gpio.c + +EC = ite +CONFIG_EC_ITE_IT5570E = y +CONFIG_EC_FLASH_SIZE_256K = y + +# Intel-based host +CONFIG_PLATFORM_INTEL = y +CONFIG_BUS_ESPI = y + +# Enable firmware security +CONFIG_SECURITY = y + +# Keyboard configuration +KEYBOARD = 14in_83 +KEYMAP = darp10-b +CONFIG_HAVE_KBLED = y +KBLED = white_dac +CFLAGS += -DKBLED_DAC=2 + + +# Set battery I2C bus +CFLAGS += -DI2C_SMBUS=I2C_4 + +# Set touchpad PS2 bus +CFLAGS += -DPS2_TOUCHPAD=PS2_3 + +# Set smart charger parameters +CHARGER = oz26786 +CFLAGS += \ + -DCHARGER_ADAPTER_RSENSE=5 \ + -DCHARGER_BATTERY_RSENSE=10 \ + -DCHARGER_CHARGE_CURRENT=1536 \ + -DCHARGER_CHARGE_VOLTAGE=17600 \ + -DCHARGER_INPUT_CURRENT=4740 + +# Set CPU power limits in watts +CFLAGS += \ + -DPOWER_LIMIT_AC=65 \ + -DPOWER_LIMIT_DC=45 + +# Fan configs +CFLAGS += -DFAN1_PWM=DCR2 +CFLAGS += -DFAN1_PWM_MIN=27 +CFLAGS += -DBOARD_FAN1_POINTS="\ + FAN_POINT(48, 27), \ + FAN_POINT(52, 27), \ + FAN_POINT(56, 33), \ + FAN_POINT(60, 37), \ + FAN_POINT(75, 53), \ + FAN_POINT(83, 65), \ + FAN_POINT(87, 75), \ + FAN_POINT(89, 77), \ +" + +CFLAGS += -DFAN2_PWM=DCR3 +CFLAGS += -DFAN2_PWM_MIN=27 +CFLAGS += -DBOARD_FAN2_POINTS="\ + FAN_POINT(48, 27), \ + FAN_POINT(52, 27), \ + FAN_POINT(56, 33), \ + FAN_POINT(60, 37), \ + FAN_POINT(75, 53), \ + FAN_POINT(83, 65), \ + FAN_POINT(87, 75), \ + FAN_POINT(89, 77), \ +" + +# Add common code +include src/board/system76/common/common.mk diff --git a/src/board/system76/darp11-b/gpio.c b/src/board/system76/darp11-b/gpio.c new file mode 100644 index 000000000..fe218103d --- /dev/null +++ b/src/board/system76/darp11-b/gpio.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include + +// uncrustify:off +struct Gpio __code ACIN_N = GPIO(B, 0); +struct Gpio __code AC_PRESENT = GPIO(F, 7); +struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0); +struct Gpio __code BKL_EN = GPIO(C, 7); +struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); // renamed to ESPI_RESET# +struct Gpio __code CCD_EN = GPIO(D, 1); +struct Gpio __code DD_ON = GPIO(E, 4); +struct Gpio __code EC_EN = GPIO(B, 6); // renamed to SUSBC_EC +struct Gpio __code EC_RSMRST_N = GPIO(E, 5); +struct Gpio __code LAN_WAKEUP_N = GPIO(B, 2); +struct Gpio __code LED_ACIN = GPIO(H, 2); +struct Gpio __code LED_BAT_CHG = GPIO(H, 5); +struct Gpio __code LED_BAT_FULL = GPIO(J, 0); +struct Gpio __code LED_PWR = GPIO(D, 0); +struct Gpio __code LID_SW_N = GPIO(B, 1); +struct Gpio __code ME_WE = GPIO(E, 6); +struct Gpio __code PCH_PWROK_EC = GPIO(F, 3); +struct Gpio __code PD_EN = GPIO(D, 4); // renamed to PD_POWER_EN +struct Gpio __code PWR_BTN_N = GPIO(D, 5); +struct Gpio __code PWR_SW_N = GPIO(B, 3); +struct Gpio __code RGBKB_DET_N = GPIO(I, 2); +struct Gpio __code SLP_S0_N = GPIO(B, 5); +struct Gpio __code SUSB_N_PCH = GPIO(H, 0); +struct Gpio __code SUSC_N_PCH = GPIO(H, 1); +struct Gpio __code VA_EC_EN = GPIO(J, 4); +struct Gpio __code WLAN_PWR_EN = GPIO(E, 1); +struct Gpio __code XLP_OUT = GPIO(B, 4); +// uncrustify:on + +static const struct GpioInit __code gpio_cfg_init[] = { + // General control + { &GCR9, BIT(5) }, // PWRSW WDT 2 Enable 2 + { &GCR8, BIT(4) }, // PWRSW WDT 2 Enable 1 + { &GCR, 0b10 << 1 }, // Enable LPC reset on GPD2 + { &GCR6, 0 }, // Disable UARTs + { &GCR15, BIT(4) }, // Enable SMBus channel 4 + { &GCR19, BIT(7) | BIT(0) }, // Set GPB5 and GPD2 to 1.8V + { &GCR20, BIT(7) }, // Set GPD3 to 1.8V, GPF2 and GPF3 to 3.3V + { &GCR21, BIT(5) | BIT(2) | BIT(1) }, // Set GPF7, GPH0, and GPH1 to 1.8V + { &GCR22, BIT(7) }, + { &GCR23, BIT(0) }, // Set GPM6 power domain to VCC + + // Port data + { &GPDRA, 0 }, + { &GPDRB, BIT(4) | BIT(3) }, // XLP_OUT, PWR_SW# + { &GPDRC, 0 }, + { &GPDRD, BIT(5) }, // PWR_BTN# + { &GPDRE, BIT(3) }, // USB_PWR_EN + { &GPDRF, BIT(6) }, // H_PECI + { &GPDRG, BIT(6) }, // H_PROCHOT_EC + { &GPDRH, 0 }, + { &GPDRI, 0 }, + { &GPDRJ, BIT(1) }, // KBC_MUTE# + { &GPDRM, 0 }, + + // Port control + { &GPCRA0, GPIO_ALT }, // EC_PWM_LEDKB_P + { &GPCRA1, GPIO_IN }, // KBC_BEEP (NC) + { &GPCRA2, GPIO_ALT }, // CPU_FAN1 + { &GPCRA3, GPIO_ALT }, // CPU_FAN2 + { &GPCRA4, GPIO_IN }, // NC + { &GPCRA5, GPIO_ALT }, // EC_PWM_LEDKB_R + { &GPCRA6, GPIO_ALT }, // EC_PWM_LEDKB_G + { &GPCRA7, GPIO_ALT }, // EC_PWM_LEDKB_B + + { &GPCRB0, GPIO_IN | GPIO_UP }, // AC_IN# + { &GPCRB1, GPIO_IN | GPIO_UP }, // LID_SW# + { &GPCRB2, GPIO_IN | GPIO_UP }, // EC_LAN_WAKEUP# + { &GPCRB3, GPIO_IN }, // PWR_SW# + { &GPCRB4, GPIO_OUT }, // XLP_OUT + { &GPCRB5, GPIO_IN }, // SLP_S0# + { &GPCRB6, GPIO_OUT }, // SUSBC_EC + + { &GPCRC0, GPIO_IN }, // ALL_SYS_PWRGD + { &GPCRC1, GPIO_ALT | GPIO_UP }, // SMC_VGA_THERM + { &GPCRC2, GPIO_ALT | GPIO_UP }, // SMD_VGA_THERM + { &GPCRC3, GPIO_ALT | GPIO_UP }, // KB-SO16 + { &GPCRC4, GPIO_IN | GPIO_UP }, // CNVI_DET# + { &GPCRC5, GPIO_ALT | GPIO_UP }, // KB-SO17 + { &GPCRC6, GPIO_IN }, // JACK_IN#_EC + { &GPCRC7, GPIO_OUT }, // BKL_EN + + { &GPCRD0, GPIO_OUT }, // LED_PWR + { &GPCRD1, GPIO_OUT }, // CCD_EN + { &GPCRD2, GPIO_ALT }, // ESPI_RESET_N + { &GPCRD3, GPIO_IN }, // SLP_A# + { &GPCRD4, GPIO_OUT }, // PD_POWER_EN + { &GPCRD5, GPIO_OUT }, // PWR_BTN# + { &GPCRD6, GPIO_ALT }, // CPU_FANSEN1 + { &GPCRD7, GPIO_ALT }, // CPU_FANSEN2 + + { &GPCRE0, GPIO_ALT | GPIO_UP }, // SMC_BAT + { &GPCRE1, GPIO_OUT }, // WLAN_PWR_EN + { &GPCRE2, GPIO_IN }, // TBT_I2C_IRQ2Z + { &GPCRE3, GPIO_OUT }, // USB_PWR_EN + { &GPCRE4, GPIO_OUT }, // DD_ON + { &GPCRE5, GPIO_OUT }, // EC_RSMRST# + { &GPCRE6, GPIO_OUT }, // ME_WE + { &GPCRE7, GPIO_ALT | GPIO_UP }, // SMD_BAT + + { &GPCRF0, GPIO_IN }, // 80CLK + { &GPCRF1, GPIO_OUT }, // USB_CHARGE_EN + { &GPCRF2, GPIO_IN }, // 3IN1 + { &GPCRF3, GPIO_OUT }, // PCH_PWROK_EC + { &GPCRF4, GPIO_ALT | GPIO_UP }, // TP_CLK + { &GPCRF5, GPIO_ALT | GPIO_UP }, // TP_DATA + { &GPCRF6, GPIO_ALT }, // H_PECI + { &GPCRF7, GPIO_OUT }, // AC_PRESENT + + { &GPCRG0, GPIO_IN }, // NC + { &GPCRG1, GPIO_IN }, // NC + { &GPCRG2, GPIO_IN }, // 100k pull-up to VDD3 + { &GPCRG3, GPIO_ALT }, // HSPI_CE# + { &GPCRG4, GPIO_ALT }, // HSPI_MSI + { &GPCRG5, GPIO_ALT }, // HSPI_MSO + { &GPCRG6, GPIO_OUT }, // H_PROCHOT_EC + { &GPCRG7, GPIO_ALT }, // HSPI_SCLK + + { &GPCRH0, GPIO_IN }, // SUSB#_PCH + { &GPCRH1, GPIO_IN }, // SUSC#_PCH + { &GPCRH2, GPIO_OUT }, // LED_ACIN + { &GPCRH3, GPIO_IN }, // NC + { &GPCRH4, GPIO_IN }, // NC + { &GPCRH5, GPIO_OUT }, // LED_BAT_CHG + { &GPCRH6, GPIO_IN }, // NC + { &GPCRH7, GPIO_IN }, // NC + + { &GPCRI0, GPIO_ALT }, // BAT_DET + { &GPCRI1, GPIO_ALT }, // BAT_VOLT + { &GPCRI2, GPIO_IN | GPIO_UP }, // RGBKB_DET# + { &GPCRI3, GPIO_ALT }, // THERM_VOLT + { &GPCRI4, GPIO_ALT }, // TOTAL_CUR + { &GPCRI5, GPIO_OUT }, // EC_CCD_WP# + { &GPCRI6, GPIO_ALT }, // THERM_VOLT2 + { &GPCRI7, GPIO_IN }, // MODEL_ID + + { &GPCRJ0, GPIO_OUT }, // LED_BAT_FULL + { &GPCRJ1, GPIO_OUT }, // KBC_MUTE# + { &GPCRJ2, GPIO_ALT }, // KBLIGHT_ADJ + { &GPCRJ3, GPIO_IN }, // SINK_CTRL_EC_1 + { &GPCRJ4, GPIO_OUT }, // VA_EC_EN + { &GPCRJ5, GPIO_IN }, // SINK_CTRL_EC_2 + { &GPCRJ6, GPIO_OUT }, // EC_GPIO + { &GPCRJ7, GPIO_IN }, // KB-DET + + { &GPCRM0, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO0_EC + { &GPCRM1, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO1_EC + { &GPCRM2, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO2_EC + { &GPCRM3, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO3_EC + { &GPCRM4, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_CLK_EC + { &GPCRM5, GPIO_ALT }, // ESPI_CS_EC# + { &GPCRM6, GPIO_IN | GPIO_UP | GPIO_DOWN }, // ESPI_ALRT0# +}; + +void gpio_init(void) { + for (uint8_t i = 0; i < ARRAY_SIZE(gpio_cfg_init); i++) { + *gpio_cfg_init[i].reg = gpio_cfg_init[i].data; + } +} diff --git a/src/board/system76/darp11-b/include/board/gpio.h b/src/board/system76/darp11-b/include/board/gpio.h new file mode 100644 index 000000000..826c111f3 --- /dev/null +++ b/src/board/system76/darp11-b/include/board/gpio.h @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#ifndef _BOARD_GPIO_H +#define _BOARD_GPIO_H + +#include + +void gpio_init(void); + +extern struct Gpio __code ACIN_N; +extern struct Gpio __code AC_PRESENT; +extern struct Gpio __code ALL_SYS_PWRGD; +extern struct Gpio __code BKL_EN; +#define HAVE_BT_EN 0 +extern struct Gpio __code BUF_PLT_RST_N; +extern struct Gpio __code CCD_EN; +extern struct Gpio __code DD_ON; +extern struct Gpio __code EC_EN; +extern struct Gpio __code EC_RSMRST_N; +extern struct Gpio __code LAN_WAKEUP_N; +extern struct Gpio __code LED_ACIN; +#define HAVE_LED_AIRPLANE_N 0 +extern struct Gpio __code LED_BAT_CHG; +extern struct Gpio __code LED_BAT_FULL; +extern struct Gpio __code LED_PWR; +extern struct Gpio __code LID_SW_N; +extern struct Gpio __code ME_WE; +#define HAVE_PCH_DPWROK_EC 0 +extern struct Gpio __code PCH_PWROK_EC; +#define HAVE_PD_EN 1 +extern struct Gpio __code PD_EN; +#define HAVE_PM_PWROK 0 +extern struct Gpio __code PWR_BTN_N; +extern struct Gpio __code PWR_SW_N; +extern struct Gpio __code RGBKB_DET_N; +extern struct Gpio __code SLP_S0_N; +#define HAVE_SLP_SUS_N 0 +#define HAVE_SUS_PWR_ACK 0 +extern struct Gpio __code SUSB_N_PCH; +extern struct Gpio __code SUSC_N_PCH; +#define HAVE_SUSWARN_N 0 +extern struct Gpio __code VA_EC_EN; +#define HAVE_WLAN_EN 0 +extern struct Gpio __code WLAN_PWR_EN; +extern struct Gpio __code XLP_OUT; + +#endif // _BOARD_GPIO_H diff --git a/src/board/system76/darp11/board.c b/src/board/system76/darp11/board.c new file mode 100644 index 000000000..f069c42e5 --- /dev/null +++ b/src/board/system76/darp11/board.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include +#include +#include +#include + +void board_init(void) { + espi_init(); + battery_charger_disable(); + + // Allow backlight to be turned on + gpio_set(&BKL_EN, true); + // Enable camera + gpio_set(&CCD_EN, true); +} + +void board_event(void) { + espi_event(); + + ec_read_post_codes(); +} diff --git a/src/board/system76/darp11/board.mk b/src/board/system76/darp11/board.mk new file mode 100644 index 000000000..e98ea400a --- /dev/null +++ b/src/board/system76/darp11/board.mk @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-3.0-only + +board-y += board.c +board-y += gpio.c + +EC = ite +CONFIG_EC_ITE_IT5570E = y +CONFIG_EC_FLASH_SIZE_256K = y + +# Intel-based host +CONFIG_PLATFORM_INTEL = y +CONFIG_BUS_ESPI = y + +# Enable firmware security +CONFIG_SECURITY = y + +# Keyboard configuration +KEYBOARD = 18H9LHA05 +KEYMAP = darp10 +CONFIG_HAVE_KBLED = y +KBLED = rgb_pwm + +# Set battery I2C bus +CFLAGS += -DI2C_SMBUS=I2C_4 + +# Set touchpad PS2 bus +CFLAGS += -DPS2_TOUCHPAD=PS2_3 + +# Set smart charger parameters +CHARGER = oz26786 +CFLAGS += \ + -DCHARGER_ADAPTER_RSENSE=5 \ + -DCHARGER_BATTERY_RSENSE=10 \ + -DCHARGER_CHARGE_CURRENT=1536 \ + -DCHARGER_CHARGE_VOLTAGE=17600 \ + -DCHARGER_INPUT_CURRENT=4740 + +# Set CPU power limits in watts +CFLAGS += \ + -DPOWER_LIMIT_AC=65 \ + -DPOWER_LIMIT_DC=45 + +# Fan configs +CFLAGS += -DFAN1_PWM=DCR2 +CFLAGS += -DFAN1_PWM_MIN=27 +CFLAGS += -DBOARD_FAN1_POINTS="\ + FAN_POINT(48, 27), \ + FAN_POINT(52, 27), \ + FAN_POINT(56, 33), \ + FAN_POINT(60, 37), \ + FAN_POINT(75, 53), \ + FAN_POINT(83, 65), \ + FAN_POINT(87, 75), \ + FAN_POINT(89, 77), \ +" + +CFLAGS += -DFAN2_PWM=DCR3 +CFLAGS += -DFAN2_PWM_MIN=27 +CFLAGS += -DBOARD_FAN2_POINTS="\ + FAN_POINT(48, 27), \ + FAN_POINT(52, 27), \ + FAN_POINT(56, 33), \ + FAN_POINT(60, 37), \ + FAN_POINT(75, 53), \ + FAN_POINT(83, 65), \ + FAN_POINT(87, 75), \ + FAN_POINT(89, 77), \ +" + +# Add common code +include src/board/system76/common/common.mk diff --git a/src/board/system76/darp11/gpio.c b/src/board/system76/darp11/gpio.c new file mode 100644 index 000000000..fe218103d --- /dev/null +++ b/src/board/system76/darp11/gpio.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#include +#include + +// uncrustify:off +struct Gpio __code ACIN_N = GPIO(B, 0); +struct Gpio __code AC_PRESENT = GPIO(F, 7); +struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0); +struct Gpio __code BKL_EN = GPIO(C, 7); +struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); // renamed to ESPI_RESET# +struct Gpio __code CCD_EN = GPIO(D, 1); +struct Gpio __code DD_ON = GPIO(E, 4); +struct Gpio __code EC_EN = GPIO(B, 6); // renamed to SUSBC_EC +struct Gpio __code EC_RSMRST_N = GPIO(E, 5); +struct Gpio __code LAN_WAKEUP_N = GPIO(B, 2); +struct Gpio __code LED_ACIN = GPIO(H, 2); +struct Gpio __code LED_BAT_CHG = GPIO(H, 5); +struct Gpio __code LED_BAT_FULL = GPIO(J, 0); +struct Gpio __code LED_PWR = GPIO(D, 0); +struct Gpio __code LID_SW_N = GPIO(B, 1); +struct Gpio __code ME_WE = GPIO(E, 6); +struct Gpio __code PCH_PWROK_EC = GPIO(F, 3); +struct Gpio __code PD_EN = GPIO(D, 4); // renamed to PD_POWER_EN +struct Gpio __code PWR_BTN_N = GPIO(D, 5); +struct Gpio __code PWR_SW_N = GPIO(B, 3); +struct Gpio __code RGBKB_DET_N = GPIO(I, 2); +struct Gpio __code SLP_S0_N = GPIO(B, 5); +struct Gpio __code SUSB_N_PCH = GPIO(H, 0); +struct Gpio __code SUSC_N_PCH = GPIO(H, 1); +struct Gpio __code VA_EC_EN = GPIO(J, 4); +struct Gpio __code WLAN_PWR_EN = GPIO(E, 1); +struct Gpio __code XLP_OUT = GPIO(B, 4); +// uncrustify:on + +static const struct GpioInit __code gpio_cfg_init[] = { + // General control + { &GCR9, BIT(5) }, // PWRSW WDT 2 Enable 2 + { &GCR8, BIT(4) }, // PWRSW WDT 2 Enable 1 + { &GCR, 0b10 << 1 }, // Enable LPC reset on GPD2 + { &GCR6, 0 }, // Disable UARTs + { &GCR15, BIT(4) }, // Enable SMBus channel 4 + { &GCR19, BIT(7) | BIT(0) }, // Set GPB5 and GPD2 to 1.8V + { &GCR20, BIT(7) }, // Set GPD3 to 1.8V, GPF2 and GPF3 to 3.3V + { &GCR21, BIT(5) | BIT(2) | BIT(1) }, // Set GPF7, GPH0, and GPH1 to 1.8V + { &GCR22, BIT(7) }, + { &GCR23, BIT(0) }, // Set GPM6 power domain to VCC + + // Port data + { &GPDRA, 0 }, + { &GPDRB, BIT(4) | BIT(3) }, // XLP_OUT, PWR_SW# + { &GPDRC, 0 }, + { &GPDRD, BIT(5) }, // PWR_BTN# + { &GPDRE, BIT(3) }, // USB_PWR_EN + { &GPDRF, BIT(6) }, // H_PECI + { &GPDRG, BIT(6) }, // H_PROCHOT_EC + { &GPDRH, 0 }, + { &GPDRI, 0 }, + { &GPDRJ, BIT(1) }, // KBC_MUTE# + { &GPDRM, 0 }, + + // Port control + { &GPCRA0, GPIO_ALT }, // EC_PWM_LEDKB_P + { &GPCRA1, GPIO_IN }, // KBC_BEEP (NC) + { &GPCRA2, GPIO_ALT }, // CPU_FAN1 + { &GPCRA3, GPIO_ALT }, // CPU_FAN2 + { &GPCRA4, GPIO_IN }, // NC + { &GPCRA5, GPIO_ALT }, // EC_PWM_LEDKB_R + { &GPCRA6, GPIO_ALT }, // EC_PWM_LEDKB_G + { &GPCRA7, GPIO_ALT }, // EC_PWM_LEDKB_B + + { &GPCRB0, GPIO_IN | GPIO_UP }, // AC_IN# + { &GPCRB1, GPIO_IN | GPIO_UP }, // LID_SW# + { &GPCRB2, GPIO_IN | GPIO_UP }, // EC_LAN_WAKEUP# + { &GPCRB3, GPIO_IN }, // PWR_SW# + { &GPCRB4, GPIO_OUT }, // XLP_OUT + { &GPCRB5, GPIO_IN }, // SLP_S0# + { &GPCRB6, GPIO_OUT }, // SUSBC_EC + + { &GPCRC0, GPIO_IN }, // ALL_SYS_PWRGD + { &GPCRC1, GPIO_ALT | GPIO_UP }, // SMC_VGA_THERM + { &GPCRC2, GPIO_ALT | GPIO_UP }, // SMD_VGA_THERM + { &GPCRC3, GPIO_ALT | GPIO_UP }, // KB-SO16 + { &GPCRC4, GPIO_IN | GPIO_UP }, // CNVI_DET# + { &GPCRC5, GPIO_ALT | GPIO_UP }, // KB-SO17 + { &GPCRC6, GPIO_IN }, // JACK_IN#_EC + { &GPCRC7, GPIO_OUT }, // BKL_EN + + { &GPCRD0, GPIO_OUT }, // LED_PWR + { &GPCRD1, GPIO_OUT }, // CCD_EN + { &GPCRD2, GPIO_ALT }, // ESPI_RESET_N + { &GPCRD3, GPIO_IN }, // SLP_A# + { &GPCRD4, GPIO_OUT }, // PD_POWER_EN + { &GPCRD5, GPIO_OUT }, // PWR_BTN# + { &GPCRD6, GPIO_ALT }, // CPU_FANSEN1 + { &GPCRD7, GPIO_ALT }, // CPU_FANSEN2 + + { &GPCRE0, GPIO_ALT | GPIO_UP }, // SMC_BAT + { &GPCRE1, GPIO_OUT }, // WLAN_PWR_EN + { &GPCRE2, GPIO_IN }, // TBT_I2C_IRQ2Z + { &GPCRE3, GPIO_OUT }, // USB_PWR_EN + { &GPCRE4, GPIO_OUT }, // DD_ON + { &GPCRE5, GPIO_OUT }, // EC_RSMRST# + { &GPCRE6, GPIO_OUT }, // ME_WE + { &GPCRE7, GPIO_ALT | GPIO_UP }, // SMD_BAT + + { &GPCRF0, GPIO_IN }, // 80CLK + { &GPCRF1, GPIO_OUT }, // USB_CHARGE_EN + { &GPCRF2, GPIO_IN }, // 3IN1 + { &GPCRF3, GPIO_OUT }, // PCH_PWROK_EC + { &GPCRF4, GPIO_ALT | GPIO_UP }, // TP_CLK + { &GPCRF5, GPIO_ALT | GPIO_UP }, // TP_DATA + { &GPCRF6, GPIO_ALT }, // H_PECI + { &GPCRF7, GPIO_OUT }, // AC_PRESENT + + { &GPCRG0, GPIO_IN }, // NC + { &GPCRG1, GPIO_IN }, // NC + { &GPCRG2, GPIO_IN }, // 100k pull-up to VDD3 + { &GPCRG3, GPIO_ALT }, // HSPI_CE# + { &GPCRG4, GPIO_ALT }, // HSPI_MSI + { &GPCRG5, GPIO_ALT }, // HSPI_MSO + { &GPCRG6, GPIO_OUT }, // H_PROCHOT_EC + { &GPCRG7, GPIO_ALT }, // HSPI_SCLK + + { &GPCRH0, GPIO_IN }, // SUSB#_PCH + { &GPCRH1, GPIO_IN }, // SUSC#_PCH + { &GPCRH2, GPIO_OUT }, // LED_ACIN + { &GPCRH3, GPIO_IN }, // NC + { &GPCRH4, GPIO_IN }, // NC + { &GPCRH5, GPIO_OUT }, // LED_BAT_CHG + { &GPCRH6, GPIO_IN }, // NC + { &GPCRH7, GPIO_IN }, // NC + + { &GPCRI0, GPIO_ALT }, // BAT_DET + { &GPCRI1, GPIO_ALT }, // BAT_VOLT + { &GPCRI2, GPIO_IN | GPIO_UP }, // RGBKB_DET# + { &GPCRI3, GPIO_ALT }, // THERM_VOLT + { &GPCRI4, GPIO_ALT }, // TOTAL_CUR + { &GPCRI5, GPIO_OUT }, // EC_CCD_WP# + { &GPCRI6, GPIO_ALT }, // THERM_VOLT2 + { &GPCRI7, GPIO_IN }, // MODEL_ID + + { &GPCRJ0, GPIO_OUT }, // LED_BAT_FULL + { &GPCRJ1, GPIO_OUT }, // KBC_MUTE# + { &GPCRJ2, GPIO_ALT }, // KBLIGHT_ADJ + { &GPCRJ3, GPIO_IN }, // SINK_CTRL_EC_1 + { &GPCRJ4, GPIO_OUT }, // VA_EC_EN + { &GPCRJ5, GPIO_IN }, // SINK_CTRL_EC_2 + { &GPCRJ6, GPIO_OUT }, // EC_GPIO + { &GPCRJ7, GPIO_IN }, // KB-DET + + { &GPCRM0, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO0_EC + { &GPCRM1, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO1_EC + { &GPCRM2, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO2_EC + { &GPCRM3, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO3_EC + { &GPCRM4, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_CLK_EC + { &GPCRM5, GPIO_ALT }, // ESPI_CS_EC# + { &GPCRM6, GPIO_IN | GPIO_UP | GPIO_DOWN }, // ESPI_ALRT0# +}; + +void gpio_init(void) { + for (uint8_t i = 0; i < ARRAY_SIZE(gpio_cfg_init); i++) { + *gpio_cfg_init[i].reg = gpio_cfg_init[i].data; + } +} diff --git a/src/board/system76/darp11/include/board/gpio.h b/src/board/system76/darp11/include/board/gpio.h new file mode 100644 index 000000000..826c111f3 --- /dev/null +++ b/src/board/system76/darp11/include/board/gpio.h @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-3.0-only + +#ifndef _BOARD_GPIO_H +#define _BOARD_GPIO_H + +#include + +void gpio_init(void); + +extern struct Gpio __code ACIN_N; +extern struct Gpio __code AC_PRESENT; +extern struct Gpio __code ALL_SYS_PWRGD; +extern struct Gpio __code BKL_EN; +#define HAVE_BT_EN 0 +extern struct Gpio __code BUF_PLT_RST_N; +extern struct Gpio __code CCD_EN; +extern struct Gpio __code DD_ON; +extern struct Gpio __code EC_EN; +extern struct Gpio __code EC_RSMRST_N; +extern struct Gpio __code LAN_WAKEUP_N; +extern struct Gpio __code LED_ACIN; +#define HAVE_LED_AIRPLANE_N 0 +extern struct Gpio __code LED_BAT_CHG; +extern struct Gpio __code LED_BAT_FULL; +extern struct Gpio __code LED_PWR; +extern struct Gpio __code LID_SW_N; +extern struct Gpio __code ME_WE; +#define HAVE_PCH_DPWROK_EC 0 +extern struct Gpio __code PCH_PWROK_EC; +#define HAVE_PD_EN 1 +extern struct Gpio __code PD_EN; +#define HAVE_PM_PWROK 0 +extern struct Gpio __code PWR_BTN_N; +extern struct Gpio __code PWR_SW_N; +extern struct Gpio __code RGBKB_DET_N; +extern struct Gpio __code SLP_S0_N; +#define HAVE_SLP_SUS_N 0 +#define HAVE_SUS_PWR_ACK 0 +extern struct Gpio __code SUSB_N_PCH; +extern struct Gpio __code SUSC_N_PCH; +#define HAVE_SUSWARN_N 0 +extern struct Gpio __code VA_EC_EN; +#define HAVE_WLAN_EN 0 +extern struct Gpio __code WLAN_PWR_EN; +extern struct Gpio __code XLP_OUT; + +#endif // _BOARD_GPIO_H