diff --git a/src/schedule/zephyr_dp_schedule.h b/src/schedule/zephyr_dp_schedule.h
index 303403565506..05f1a66ca63a 100644
--- a/src/schedule/zephyr_dp_schedule.h
+++ b/src/schedule/zephyr_dp_schedule.h
@@ -25,7 +25,9 @@ struct scheduler_dp_data {
 
 enum sof_dp_part_type {
 	SOF_DP_PART_HEAP,
+	SOF_DP_PART_HEAP_CACHE,
 	SOF_DP_PART_CFG,
+	SOF_DP_PART_CFG_CACHE,
 	SOF_DP_PART_TYPE_COUNT,
 };
 
diff --git a/src/schedule/zephyr_dp_schedule_application.c b/src/schedule/zephyr_dp_schedule_application.c
index dc0e0fe1da3e..57935a4b464e 100644
--- a/src/schedule/zephyr_dp_schedule_application.c
+++ b/src/schedule/zephyr_dp_schedule_application.c
@@ -391,7 +391,9 @@ void scheduler_dp_domain_free(struct processing_module *pmod)
 	struct task_dp_pdata *pdata = pmod->dev->task->priv_data;
 
 	k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_HEAP);
+	k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_HEAP_CACHE);
 	k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_CFG);
+	k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_CFG_CACHE);
 }
 
 /* Called only in IPC context */
@@ -505,12 +507,22 @@ int scheduler_dp_task_init(struct task **task, const struct sof_uuid_entry *uid,
 		.size = size,
 		.attr = K_MEM_PARTITION_P_RW_U_RW,
 	};
+	pdata->mpart[SOF_DP_PART_HEAP_CACHE] = (struct k_mem_partition){
+		.start = (uintptr_t)sys_cache_cached_ptr_get((void *)start),
+		.size = size,
+		.attr = K_MEM_PARTITION_P_RW_U_RW | XTENSA_MMU_CACHED_WB,
+	};
 	/* Host mailbox partition for additional IPC parameters: read-only */
 	pdata->mpart[SOF_DP_PART_CFG] = (struct k_mem_partition){
-		.start = (uintptr_t)MAILBOX_HOSTBOX_BASE,
+		.start = (uintptr_t)sys_cache_uncached_ptr_get((void *)MAILBOX_HOSTBOX_BASE),
 		.size = 4096,
 		.attr = K_MEM_PARTITION_P_RO_U_RO,
 	};
+	pdata->mpart[SOF_DP_PART_CFG_CACHE] = (struct k_mem_partition){
+		.start = (uintptr_t)MAILBOX_HOSTBOX_BASE,
+		.size = 4096,
+		.attr = K_MEM_PARTITION_P_RO_U_RO | XTENSA_MMU_CACHED_WB,
+	};
 
 	for (pidx = 0; pidx < SOF_DP_PART_TYPE_COUNT; pidx++) {
 		ret = k_mem_domain_add_partition(dp_mdom + core, pdata->mpart + pidx);
diff --git a/tools/topology/topology2/cavs-nocodec.conf b/tools/topology/topology2/cavs-nocodec.conf
index fea906f98741..dc50104ea2a9 100644
--- a/tools/topology/topology2/cavs-nocodec.conf
+++ b/tools/topology/topology2/cavs-nocodec.conf
@@ -96,7 +96,8 @@ Define {
 	SSP2_PCM_CORE_ID		2
 	DMIC0_PCM_0_NAME		"DMIC SFX1"
 	DMIC0_PCM_1_NAME		"DMIC SFX2"
-	SRC_DOMAIN			"default"
+	SRC_DOMAIN_PLAYBACK		"DP"
+	SRC_DOMAIN_CAPTURE		"default"
 	# Keep DP_SRC_CORE_ID == SSP2_PCM_CORE_ID, no nested define resolvation ATM
 	DP_SRC_CORE_ID			2
 }
@@ -694,8 +695,8 @@ IncludeByKey.PASSTHROUGH {
 					}
 				}
 				Object.Widget.src.1 {
-					scheduler_domain "$SRC_DOMAIN"
-					IncludeByKey.SRC_DOMAIN {
+					scheduler_domain "$SRC_DOMAIN_PLAYBACK"
+					IncludeByKey.SRC_DOMAIN_PLAYBACK {
 						"DP" {
 						core_id $DP_SRC_CORE_ID
 						domain_id 123
@@ -1378,8 +1379,8 @@ IncludeByKey.PASSTHROUGH {
 				Object.Widget.src.1 {
 					index	    11
 					rate_in     48000
-					scheduler_domain "$SRC_DOMAIN"
-					IncludeByKey.SRC_DOMAIN {
+					scheduler_domain "$SRC_DOMAIN_CAPTURE"
+					IncludeByKey.SRC_DOMAIN_CAPTURE {
 						"DP" {
 						core_id $DP_SRC_CORE_ID
 						domain_id 123
diff --git a/tools/topology/topology2/development/tplg-targets.cmake b/tools/topology/topology2/development/tplg-targets.cmake
index 7986eb2bad11..ac04750e5711 100644
--- a/tools/topology/topology2/development/tplg-targets.cmake
+++ b/tools/topology/topology2/development/tplg-targets.cmake
@@ -306,23 +306,23 @@ PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-tgl-nocodec-rtcaec.bin"
 
 # SSP test topology for Data Processing SRC on MTL
 "cavs-nocodec\;sof-mtl-nocodec-dp-test\;PLATFORM=mtl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
-PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN=DP"
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP"
 # SSP test topology for Data Processing SRC on LNL
 "cavs-nocodec\;sof-lnl-nocodec-dp-test\;PLATFORM=lnl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
-PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN=DP"
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP"
 # SSP test topology for Data Processing SRC on PTL
 "cavs-nocodec\;sof-ptl-nocodec-dp-test\;PLATFORM=ptl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
-PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN=DP"
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP"
 
 # SSP test topology for Data Processing on core 1 SRC for MTL
 "cavs-nocodec\;sof-mtl-nocodec-dp-core-test\;PLATFORM=mtl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
-PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP,DP_SRC_CORE_ID=1"
 # SSP test topology for Data Processing on core 1 SRC for LNL
 "cavs-nocodec\;sof-lnl-nocodec-dp-core-test\;PLATFORM=lnl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
-PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP,DP_SRC_CORE_ID=1"
 # SSP test topology for Data Processing on core 1 SRC for PTL
 "cavs-nocodec\;sof-ptl-nocodec-dp-core-test\;PLATFORM=ptl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
-PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP,DP_SRC_CORE_ID=1"
 
 # Add MFCC to 16 kHz DMIC1, 2ch with NHLT - cAVS
 "sof-hda-generic\;sof-hda-generic-cavs25-2ch-mfcc\;HDA_CONFIG=mix,\