[aaelf64-morello] Document program headers and dynamic section #359
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PT_AARCH64_MEMTAG_CHERI has been used by GDB and CheriBSD for several years at this point, after discussion with Arm and Linaro, but was never officially documented. Thankfully it appears that nothing has taken this value in the meantime. No Morello-specific dynamic tags exist.
bsdjhb
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Jan 8, 2026
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Not sure if it is worth documenting other fields such as the role of p_align (tag stride) and p_memsz vs p_filesz. This follows the same conventions used for the similar segment for MTE tags, just that it uses 1 packed bit per 16 bytes of address space rather than 4 packed bits.
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For MTE it just references the Linux kernel's documentation. I didn't go into too much detail here in part because I didn't want to claim anything that wasn't true, but anything that deviates from what's "normal" (e.g. not like p_vaddr/p_memsz which are what you'd expect) would be worth adding. |
smithp35
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Jan 8, 2026
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LGTM too. I'll merge at the end of the week to leave some time for further comments.
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PT_AARCH64_MEMTAG_CHERI has been used by GDB and CheriBSD for several
years at this point, after discussion with Arm and Linaro, but was never
officially documented. Thankfully it appears that nothing has taken this
value in the meantime.
No Morello-specific dynamic tags exist.