completed homework 1

hw1.t.v

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+`include "hw1.v"
+
+module demorgan_test ();
+
+// Instantiate device/module under test
+reg A, B; //test inputs
+wire nA, nB, nAandnB, AnandB, nAornB, AnorB; //test outputs
+
+demorgan dut(A, B, nA, nB, nAandnB, AnandB, nAornB, AnorB);
+
+// Run tests
+
+initial begin
+  $display("\n");
+  $display("| A B | ~A ~V || ~A~B | ~(A+B) || ~A+~B | ~(AB) |");
+  A=0;B=0; #1
+  $display("| %b %b |  %b  %b ||   %b  |    %b   ||   %b   |   %b   |", 
+	A,B, nA, nB, nAandnB, AnorB, nAornB, AnandB);
+  A=0;B=1; #1
+  $display("| %b %b |  %b  %b ||   %b  |    %b   ||   %b   |   %b   |", 
+	A,B, nA, nB, nAandnB, AnorB, nAornB, AnandB);
+  A=1;B=0; #1
+  $display("| %b %b |  %b  %b ||   %b  |    %b   ||   %b   |   %b   |", 
+	A,B, nA, nB, nAandnB, AnorB, nAornB, AnandB);
+  A=1;B=1; #1
+  $display("| %b %b |  %b  %b ||   %b  |    %b   ||   %b   |   %b   |", 
+	A,B, nA, nB, nAandnB, AnorB, nAornB, AnandB);
+  $display("\n");
+end
+endmodule

hw1.v

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+// homework 1, exhaustively prove demorgan's law
+
+module demorgan
+(
+  input A,
+  input B,
+  output nA,
+  output nB,
+  output nAandnB,
+  output AnandB,
+  output nAornB,
+  output AnorB
+);
+
+  wire nA;
+  wire nB;
+  not Ainv(nA, A);
+// type: not, name: Ainv, output variable: nA, input variable: A
+  not Binv(nB, B);
+  and andgate(nAandnB, nA, nB);
+  nand nandgate(AnandB, A, B);
+  or orgate(nAornB, nA, nB);
+  nor norgate(AnorB, A, B);
+
+endmodule
+

results.txt

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+
+
+| A B | ~A ~V || ~A~B | ~(A+B) || ~A+~B | ~(AB) |
+| 0 0 |  1  1 ||   1  |    1   ||   1   |   1   |
+| 0 1 |  1  0 ||   0  |    0   ||   1   |   1   |
+| 1 0 |  0  1 ||   0  |    0   ||   1   |   1   |
+| 1 1 |  0  0 ||   0  |    0   ||   0   |   0   |
+
+