A C-based operating system simulation project built in two phases to mimic job control, memory paging, instruction handling, and interrupt management.
- Simulates memory with 300 blocks (4 chars each)
- Implements instruction parsing (
GD,PD,LR,SR,CR,BT,H) - Simulates page tables, valid/invalid page faults
- Handles TTL (Total Time Limit) & TLL (Total Line Limit) for jobs
- Provides detailed error handling and output logging
phase1.c– Initial version with basic instruction simulationphase2.c– Advanced simulation with paging and PCB-level job managementinput.txt– Sample input file with job cards ($AMJ,$DTA,$END)output.txt– Output generated after execution
- C
- File I/O
- Memory simulation
- Operating System fundamentals
gcc phase2.c -o os_sim
./os_simAuthor Himanshu Khandelwal GitHub: https://github.com/HimanshuKK08