Decode Pipeline Stage Implementation #133
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Addressing #124, the decode stage has been implemented with two interfaces created:
It has not been integrated into the top-level module (utoss_riscv) yet as the remaining stages need to be implemented first. Furthermore, since interfaces are not well-supported by iVerilog, the CI and Makefile was modified to instead support Verilator, and it is working as expected.
Lastly, the file structure under "src/" has been organized for easier readability.