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1. CMOS-Standard-Cell-Library CMOS-Standard-Cell-Library Public

   CMOS Standard Cell Library & 1-Bit Full Adder: A bottom-up digital design project using LTspice. Features transistor-level implementation of primitives (NAND/NOR/XOR) and hierarchical design of a 1…

   Prolog

2. rtl-riscv32 rtl-riscv32 Public

   A 32-bit RISC-V (RV32I) processor implemented in Verilog using a single-cycle architecture. Includes instruction fetch, decode, ALU execution, register file operations, and basic control logic for …

   Verilog

3. rtl-spi-controller rtl-spi-controller Public

   Synthesizable Verilog RTL implementation of a full-duplex SPI (Serial Peripheral Interface) Master and Slave. Features configurable clock dividers, Mode 0 (CPOL=0, CPHA=0) timing.

   Verilog

4. uart-16bit-verilog uart-16bit-verilog Public

   Synthesizable 16-bit UART (TX/RX) in Verilog with Even Parity. Features a robust receiver with double-flop synchronization, noise filtering, and atomic data updates. Fully parametric design with a …

   Verilog

5. rtl-traffic-controller rtl-traffic-controller Public

   FSM-based traffic light controller implemented in Verilog with timed state transitions and an emergency-response override flag for priority handling. Designed for synchronous control and real-time …

   Verilog 1

6. arduino-avoidance-robot arduino-avoidance-robot Public

   An Arduino-powered autonomous car that detects and avoids obstacles using ultrasonic sensing and real-time motor control. This project demonstrates basic robotics concepts, sensor integration, and …

   C++