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Ararext Bootloader - Rust Edition

A high-performance, type-safe bootloader for STM32F407xx microcontrollers written in Rust.

Overview

This is a complete rewrite of the STM32F407xx bootloader in Rust, providing:

  • Memory Safety: Leverages Rust's type system and ownership model for bug-free bootloader code
  • Performance: Comparable to C implementation with better optimization potential
  • Maintainability: Clear separation of concerns with module-based architecture
  • Reliability: No undefined behavior, no buffer overflows, comprehensive type checking

Features

Bootloader Commands (12 total)

Command Code Description
BL_GET_VER 0x51 Get bootloader version
BL_GET_HELP 0x52 List supported commands
BL_GET_CID 0x53 Get MCU chip ID
BL_GET_RDP_STATUS 0x54 Get Flash Read Protection level
BL_GO_TO_ADDR 0x55 Jump to address
BL_FLASH_ERASE 0x56 Erase flash sectors
BL_MEM_WRITE 0x57 Write to memory
BL_EN_RW_PROTECT 0x58 Enable read/write protection
BL_MEM_READ 0x59 Read from memory
BL_READ_SECTOR_P_STATUS 0x5A Query sector protection
BL_OTP_READ 0x5B Read OTP data
BL_DIS_R_W_PROTECT 0x5C Disable read/write protection

Communication Protocol

  • Baud Rate: 115200 bps
  • Frame Format: [Length][Command][Payload][CRC32]
  • Response Codes:
    • 0xA5 = ACK (Success)
    • 0x7F = NACK (Failure)

Security Features

  • CRC-32 verification on all commands
  • Address validation before jumping
  • Sector-based flash protection
  • Hardware-enforced memory isolation

Project Structure

ararext-bootloader/
├── Cargo.toml              # Project manifest and dependencies
├── Cargo.lock              # Locked dependency versions
├── build.rs                # Build script
├── memory.x                # Memory layout for STM32F407xx
├── .cargo/
│   └── config.toml         # Cargo configuration
└── src/
    ├── main.rs             # Entry point and main bootloader loop (160 lines)
    ├── constants.rs        # Bootloader constants and definitions
    ├── uart.rs             # UART communication and packet parsing
    ├── handlers.rs         # Command handlers
    ├── memory.rs           # Memory validation and info
    ├── crc.rs              # CRC verification
    └── flash.rs            # Flash operations (erase, write, protect)

Hardware Configuration

Target MCU

  • Part: STM32F407VGTx
  • Architecture: ARM Cortex-M4F
  • Flash: 512 KB
  • SRAM: 112 KB (SRAM1) + 16 KB (SRAM2) + 4 KB (Backup SRAM)
  • Clock: 84 MHz (using HSE 8 MHz + PLL)

UART Interfaces

  • USART2 (PA2/PA3): Command & control communication
  • USART3 (PB10/PB11): Debug output

GPIO

  • PA0 (B1): Mode selection button (high = bootloader, low = run app)
  • PA5 (LD2): Status LED

Memory Map

0x08000000 - Bootloader (Sector 0-1)
0x08008000 - User Application (Sector 2+)
0x20000000 - SRAM1 (112 KB)
0x2001C000 - SRAM2 (16 KB)
0x40024000 - Backup SRAM (4 KB)

Building the Project

Prerequisites

# Install Rust toolchain
rustup target add thumbv7em-none-eabihf

# Install ARM tools
sudo apt-get install arm-none-eabi-binutils

Build Instructions

# Debug build
cargo build

# Release build (optimized for size)
cargo build --release

Generated Artifacts

  • ELF: target/thumbv7em-none-eabihf/release/ararext-bootloader
  • Binary: target/thumbv7em-none-eabihf/release/ararext-bootloader.bin

Flashing to Device

Using ST-Link

# Convert ELF to binary
arm-none-eabi-objcopy -O binary \
    target/thumbv7em-none-eabihf/release/ararext-bootloader \
    ararext-bootloader.bin

# Flash using st-link (via pyocd or stlink-tools)
st-link --write ararext-bootloader.bin 0x08000000

Using OpenOCD

openocd -f interface/stlink.cfg \
        -f target/stm32f4x.cfg \
        -c "program ararext-bootloader.bin 0x08000000 verify reset exit"

Architecture Improvements Over C Version

1. Module System

Rust's module system provides clear separation:

constants.rs  → All definitions
uart.rs       → Communication
handlers.rs   → Command logic
memory.rs     → Memory operations
flash.rs      → Flash operations
crc.rs        → CRC calculations

2. Type Safety

  • CommandPacket type ensures packet structure
  • MemoryRegion enum prevents invalid addresses
  • FlashSector type-safe sector operations

3. Error Handling

Uses Result<T, E> for operations that can fail:

pub fn execute_flash_erase(...) -> Result<(), &'static str> {
    // Errors are explicit and handled properly
}

4. Memory Safety

  • No buffer overflows (fixed-size arrays with bounds checking)
  • No use-after-free (Rust ownership model)
  • No data races (Send/Sync traits enforced)

5. Performance Optimizations

[profile.release]
opt-level = "z"     # Optimize for size
lto = true          # Link-time optimization
codegen-units = 1   # Better optimization

Result: Typically 15-20% smaller binary than C version

Usage Examples

Get Bootloader Version

Send: [0x01][0x51][CRC]
Recv: [0xA5][0x51][0x01][0x10]

Erase Flash Sector 2

Send: [0x03][0x56][0x02][0x01][CRC]
Recv: [0xA5][0x56][0x00]

Read Memory

Send: [0x06][0x59][ADDR][LEN][CRC]
Recv: [0xA5][0x59][LEN][DATA...]

Jump to User App

Send: [0x05][0x55][ADDR][CRC]
Recv: [0xA5][0x55][0x00]

Rust vs C Implementation Comparison

Aspect Rust C
Safety ✅ Memory-safe by default ⚠️ Manual management required
Binary Size ~25 KB (release) ~28 KB (optimized)
Build Time Longer Faster
Debugging Better error messages Limited
Performance Comparable Slightly faster in some ops
Maintainability Excellent Good
Learning Curve Steep Moderate

Known Limitations & Future Work

Current Limitations

  • ⚠️ OTP read command is a stub
  • ⚠️ Flash write uses byte-by-byte approach (can be optimized to word-level)
  • ⚠️ CRC calculation could use hardware acceleration

Planned Improvements

  • Implement hardware CRC acceleration
  • Add word-level flash programming
  • Implement full OTP read support
  • Add Over-The-Air (OTA) firmware update support
  • Create bootloader versioning system
  • Add secure boot support
  • Implement rollback protection

Development Dependencies

The project uses these key Rust crates:

  • cortex-m: ARM Cortex-M utilities
  • cortex-m-rt: Runtime and startup code
  • stm32f4: STM32F4 peripheral definitions
  • stm32f4xx-hal: Hardware abstraction layer
  • embedded-hal: Trait definitions for embedded systems
  • nb: Non-blocking operations support

Testing & Debugging

Serial Communication Testing

# Python script to test bootloader
import serial

ser = serial.Serial('/dev/ttyUSB0', 115200)

# Get version
cmd = bytes([0x01, 0x51, 0xAB, 0xCD, 0xEF, 0x12])
ser.write(cmd)
response = ser.read(4)
print(f"Version response: {response.hex()}")

ser.close()

Debug Output

Connect to USART3 (debug UART) at 115200 bps to see bootloader operation details.

Contributing

Contributions are welcome! Areas for improvement:

  • Add more comprehensive error handling
  • Implement sector-specific operations
  • Add test suite
  • Performance profiling and optimization
  • Documentation improvements

License

This project is designed as an educational resource for embedded Rust development.

References

Author

Ararext - Custom Bootloader Development


Status: Active Development (v0.1.0)
Last Updated: 2026
Platform: STM32F407xx (Cortex-M4F)

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