feat: parallel-prefix-sum circuit

[luisacicolini]

This PR introduces a new operation BitVec.hAdd, which recursively adds l-long words in a (flattened) w-long bitvector, similarly to the vectorized add operation we find e.g. in LLVM and in assembly intrinsics. We equip this operation with a bitblastable circuit and operation (parPreSum) implementing the operation via parallel-prefix-sum circuit for efficiency.

This circuit is the base to construct an efficient bitblasting circuit for BitVec.cpop, and part of our effort to make the RISC-V ISA bitblastable.

[leanprover-community-bot]

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