GitHub - manishkjain21/HDL_Lab2017: Updated with Initial Codes

Name		Name	Last commit message	Last commit date
Latest commit History 35 Commits
work		work
.gitattributes		.gitattributes
.gitignore		.gitignore
alu.v		alu.v
alu.v.bak		alu.v.bak
apsr.v		apsr.v
apsr.v.bak		apsr.v.bak
branch.v		branch.v
branch.v.bak		branch.v.bak
control_block.v		control_block.v
control_block.v.bak		control_block.v.bak
control_block_tb.v		control_block_tb.v
control_block_tb.v.bak		control_block_tb.v.bak
cpu.v		cpu.v
cpu.v.bak		cpu.v.bak
cpu_tb.v		cpu_tb.v
cpu_tb.v.bak		cpu_tb.v.bak
decode.v		decode.v
decode.v.bak		decode.v.bak
decode_tb.v		decode_tb.v
demux12.v		demux12.v
demux12.v.bak		demux12.v.bak
fetch.v		fetch.v
fetch_tb.v		fetch_tb.v
hdl_lab.cr.mti		hdl_lab.cr.mti
hdl_lab.mpf		hdl_lab.mpf
memory.sv		memory.sv
mux21.v		mux21.v
mux21_4bit.v		mux21_4bit.v
mux21_4bit.v.bak		mux21_4bit.v.bak
mux21_tb.v		mux21_tb.v
pc.v		pc.v
pc.v.bak		pc.v.bak
pc_increment.v		pc_increment.v
reg_control_tb.v		reg_control_tb.v
register_file.v		register_file.v
register_file.v.bak		register_file.v.bak
register_file_tb.v		register_file_tb.v
sign_extend.v		sign_extend.v
sign_extend_tb.v		sign_extend_tb.v
stack.v		stack.v
testbench.sv		testbench.sv
testbench.sv.bak		testbench.sv.bak
transcript		transcript

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