This repository contains a simple approach to design single stage operational amplifier using gpdk180 in Cadence Virtuoso.
-
Updated
Mar 26, 2024
#
gpdk180
Here are 2 public repositories matching this topic...
Design and simulation of 16-bit Ripple Carry and Weinberger Adders using Cadence Virtuoso. Includes full adder modeling, schematic creation, waveform analysis, and detailed delay-power comparison.
vlsi cadence digital-design waveform-analysis cmos-technology ripple-carry-adder eda-tools gpdk180 schematic-design adder-architecture weinberger-adder vlsi-simulation high-speed-arithmetic
-
Updated
Dec 7, 2025
Improve this page
Add a description, image, and links to the gpdk180 topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the gpdk180 topic, visit your repo's landing page and select "manage topics."