Project done for my B.Tech course on Formal Methods for System Verification
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Oct 25, 2021
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traffic-controller
Here are 5 public repositories matching this topic...
FSM-based traffic light controller implemented in Verilog with timed state transitions and an emergency-response override flag for priority handling. Designed for synchronous control and real-time traffic management logic.
fsm fpga rtl verilog vivado systemverilog hdl flags emergency-response traffic-light emergent-behavior traffic-controller
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Dec 17, 2025 - Verilog
Simulating traffic controller sequence at Thapathali intersection using Xilinx and 8051
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Aug 9, 2018 - C
Sensor-aware 4-road traffic light controller using Finite State Machine in Verilog. Dynamically manages traffic flow with priority-based signal allocation, timer-controlled phase transitions, and real-time traffic monitoring for smart city applications.
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Aug 4, 2025 - Verilog
AI-driven models can predict congestion and optimize signal timings dynamically, improving traffic movement. Combining these predictions with FPGA-based real-time control enables fast, reliable, and intelligent traffic management for modern smart cities.
fpga cnn-lstm traffic-congestion traffic-controller anaconda-prompt sumo-simulated-data ml-prediction-directionwise green-light-adjestment fail-safe-mode
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Dec 28, 2025 - Python
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